Home    --    Hierarchy    --    Packages    --    Entities    --    Instantiations    --    Sources

Entity work.clock_div

Clock divider for System09

Defined in VHDL/clock_div.vhd

Author: John E. Kent
Version: 0.2 from 2010-09-14

Architectures

RTL


Libraries and global use clauses

library ieee
use ieee.numeric_std.all
use ieee.std_logic_1164.all
use IEEE.STD_LOGIC_ARITH.ALL
use IEEE.STD_LOGIC_UNSIGNED.ALL

Ports

clk_in instd_Logic
sys_clk outstd_logic
vga_clk outstd_logic
cpu_clk outstd_logic

Generated on 1 Jan 2018 19:48:42 with VHDocL V0.2.6