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Entity work.ioport

Synthesizable Dual Bidirectionsal I/O Port

Defined in VHDL/ioport.vhd

Author: John E. Kent
Version: 1.2 from 30 May 2010


Detailed description

ioport is a dual bi-directional 8 bit I/O port written in VHDL.

Architectures

rtl


Libraries and global use clauses

library ieee
use ieee.std_logic_1164.all
use ieee.std_logic_unsigned.all

Ports

clk instd_logic
rst instd_logic
cs instd_logic
rw instd_logic
addr instd_logic_vector(1 downto 0)
data_in instd_logic_vector(7 downto 0)
data_out outstd_logic_vector(7 downto 0)
porta_io inoutstd_logic_vector(7 downto 0)
portb_io inoutstd_logic_vector(7 downto 0)

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