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Instantiation hierarchy

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Designated top modules

  work.my_system09 (rtl) Top level file for 6809 compatible system on a chip
  work.cpu09 (rtl) Synthesizable 6809 instruction compatible VHDL CPU core
  work.mon_rom (rtl) ROM with SYS09BUG Monitor Program
  RAMB16_S9
  work.flex_ram (rtl) Flex9 O/S Initialised 8KByte RAM
  RAMB16_S9
  work.ACIA_6850 (rtl) Architecture for ACIA_6850 Interface registers
  work.ACIA_RX (rtl)
  work.ACIA_TX (rtl)
  work.acia_clock (rtl) Architecture for ACIA_Clock
  work.keyboard (rtl) Synthesizable Interface to PS/2 Keyboard Module
  work.ps2_keyboard (rtl) Implements a PS/2 Keyboard Interface
  work.keymap_rom (rtl) Synthesizable PS/2 Keyboard Key map ROM for Spartan3
  RAMB16_S9
  work.vdu8 (RTL) Implements a text based Colour Video Display Unit for System09
  work.char_rom (rtl) Character Generator
  RAMB16_S9
  work.ram_2k (rtl) 2K Block RAM
  RAMB16_S9
  work.timer (rtl) Synthesizable 8 bit Timer
  work.trap (trap_arch) Synthesizable Hardware Breakpoint Trap
  work.dat_ram (rtl) Synthesizable SWTPc 6809 Dynamic Address Translation Table
  work.XSASDRAMCntl (arch) Customizes the generic SDRAM controller module for the XSA Board.
  IBUFG
  CLKDLL
  BUFG
  SRL16
  work.sdramCntl (arch) SDRAM controller
  BUFG

Other uninstantiated modules

  work.acia6850 (rtl) Synthesizable 6850 compatible ACIA
  work.clock_div (RTL) Clock divider for System09
  BUFG
  work.clock_dll (RTL) Synthesible System Clock Divider for Xilinx Spartan 3
  IBUFG
  BUFG
  CLKDLL
  SRL16
  work.dma6844 (rtl) Synthesizable 6844 Compatible DMA Controller
  work.dualport (arch) Dual-port front-end for SDRAM controller.
  work.epp (rtl) Synthesizable Enhance Parallel Port
  work.flasher (rtl) LED Flasher
  work.ioport (rtl) Synthesizable Dual Bidirectionsal I/O Port
  work.maisforth_rom_16k (rtl) Mais Forth 16K ROM for the 6809
  RAMB16_S9
  work.peripheral_bus (rtl) Peripheral Bus Interface
  work.pia6821 (pia_arch) Synthesizable 6821 Compatible Parallel Interface Adapter
  work.pia_timer (pia_arch) Synthesizable Parallel Interface Adapter with Timer
  work.priority_rot (rtl) Synthesizable Rotating Priority Encoder
  work.quadcpu09 (RTL) Top level file for quad Core 6809 compatible system on a chip
  work.unicpu09 (RTL) Synthesizable Single 6809 Instruction Compatible CPU Module
  work.cpu09 (rtl) Synthesizable 6809 instruction compatible VHDL CPU core
  mmu
  work.mon_rom (rtl) ROM with SYS09BUG Monitor Program
  RAMB16_S9
  dpr_2k
  work.mul32 (rtl) Synthesizable 32 bit Multiplier Register for Spartan 3/3E
  work.ram_24k (rtl) 24K Block RAM
  RAMB16_S9
  work.ram_32k (rtl) 32K Block RAM
  RAMB16_S9
  work.rom_8k (rtl) Trace bug ROM
  RAMB16_S9
  work.seven_segment (rtl) Synthesizable Multiplex Seven Segment LED Driver
  work.SevenSegmentDisplay (Behavioral)
  DecoderDriver
  work.spi_master (rtl) Implements a SPI Master Controller
  work.spp (rtl) Implements a Simple Parallel Port for System09
  work.SYS09BUG_F800 (rtl) Sys09 bug ROM
  RAMB16_S9
  work.trace (trace_arch) Implements a hardware real-time trace buffer for system09.
  trace_ram
  work.twi (rtl) Implements an I2C master Interface
  work.ACIA_RX (rtl)
  work.ACIA_TX (rtl)
  work.vdu8_mono (RTL) Implements a text based Monochrome Video Display Unit for System09
  work.char_rom (rtl) Character Generator
  RAMB16_S9
  work.ram_2k (rtl) 2K Block RAM
  RAMB16_S9

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