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6850 ACIA core
Defined in VHDL/ACIA_6850.vhd
Authors: Ovidiu Lupas, John Kent
Version: 4.2 from 25 February 2007
Syntheziable ACIA 6850 core.
library ieee | |
use ieee.numeric_std.all | |
use ieee.std_logic_1164.all |
clk | in | Std_Logic |
rst | in | Std_Logic |
cs | in | Std_Logic |
rw | in | Std_Logic |
irq | out | Std_Logic |
Addr | in | Std_Logic |
DataIn | in | Std_Logic_Vector(7 downto 0) |
DataOut | out | Std_Logic_Vector(7 downto 0) |
RxC | in | Std_Logic |
TxC | in | Std_Logic |
RxD | in | Std_Logic |
TxD | out | Std_Logic |
DCD_n | in | Std_Logic |
CTS_n | in | Std_Logic |
RTS_n | out | Std_Logic |