Author: John E. Kent
Version: 2.1 from 2010-06-17
Operation:
Write count to counter register.
Enable counter by setting bit 0 of the control register.
Enable interrupts by setting bit 7 of the control register.
Counter will count down to zero.
When it reaches zero the terminal flag is set.
If the interrupt is enabled an interrupt is generated.
The interrupt may be disabled by writing a 0 to bit 7
of the control register or by loading a new down count
into the counter register.
timer_control ( clk, rst, cs, rw, addr, data_in, timer_ctrl, timer_term, timer_count ) |
timer_status ( timer_ctrl, timer_term ) |
| timer status register |
timer_data_out ( addr, timer_count, timer_stat ) |
| timer data output mux |
timer_interrupt ( timer_term, timer_ctrl ) |
| read timer strobe to reset interrupts |